Abstract

This paper proposes low-power design of the Gaussian-Minimum Shift-Keying (GMSK) demodulator using baseband quadrature signals. High-level architecture of this demodulator incorporates CO-ordinate Rotation-DIgital Computer (CORDIC) engine to accept the in-phase and quadrature components from received GMSK signal to generate phase angle and magnitude of the GMSK signal vector at half the sampling frequency thereby reducing the power consumption. Additionally, the design of differentiator and synchronizer for the suggested GMSK demodulator has been carried out. The proposed demodulator is implemented in field-programmable gate-array (FPGA) and post-route simulated for functional verification. Thereafter, BER performance analysis of this design has been carried out in Additive White Gaussian Noise (AWGN) channel environment. Finally, the suggested architecture is synthesized and post-layout simulated using 90 nm CMOS technology node. It occupies a core area of 0.12 mm 2 with 17770 gates and consumes 4.42 mW at 167 MHz of clock frequency.

Abstract

The significance of anomaly detection is increasing as a result of the rapid increase in unknown attacks. With the increase in deployment of scalable web services, there is a need for developing a scalable anomaly detection mechanisms. In this paper, we propose a scalable anomaly-based Bot Detection Architecture (BotD) in which different anomaly-based bot detection algorithms can be implemented. Our architecture leverages NF scalability provided by Network Function Virtualization (NFV), and network programmability provided by Software Defined Networking (SDN). We have also proposed a loss-free state transfer technique across NFs. We have simulated our architecture using Mininet and Ryu controller, and tested the functioning of the architecture.

Abstract

This paper presents new system-level design for the cognitive sensor based on energy detection to boast the performance accuracy by maintaining a queue of energy samples and computing their average to determine the decision threshold. Thereafter, these values summed over average number of samples are again compared with the recent energy value to decide whether the spectrum is occupied or unoccupied more accurately. The performance of such technique is evaluated analytically for various decision thresholds. Such evaluations indicate that the some advancements made to the energy detection algorithm has demonstrated improvements in the spectrum sensing accuracy under varying signal to noise ratio (SNR) values. Subsequently, we have shown the benefits of the proposed scheme in increas- ing the agility of cognitive radio systems. The performance is measured by using the receiver operating characteristic (ROC) curves under varying number of levels for different SNR values like: -5 dB, -10 dB, -15 dB and -20 dB. With small tradeoffs between the detection probability and the false alarm probability, the scheme improves the spectrum sensing ability greatly in low SNR situations when tested with 10, 100, 1000, 10000 and 100000 samples. Thereby, enhancing the performance of such hardware friendly sensors under low SNR has been a potential achievement of our work. Finally, field-programmable gate-array (FPGA) prototyping of the proposed sensor architecture has been carried out and it has a latency of 21760 nS. Index Terms—Digital Design, FPGA, cognitive radio, detection probability, spectrum sensing and energy detection

Abstract

MIL-STD-1553B data buses are in use in almost all aircrafts and many ground-based military vehicles. But, present day aircraft equipments have much higher bandwidth requirements compared to what is offered by 1-Mb/s legacy 1553 system hardware. A complete rewiring would result in the aircrafts being non operational for a long time, in addition to its high cost of implementation. Instead, only the obsolete MIL-STD-1553 system-on-chip integrated circuits can be substituted to extend their functionality to higher data rates. In this work, we describe the operating principle and implementation of a low power transceiver upgrade which effectively equalizes a 1553 channel across the whole 100-MHz spectrum. Implemented in 0.18μm, this transceiver upgrade circuit achieves a BER of < 10 −16 over a 300-ft 1553 bus while receiving 100-Mb/s data, with a total power consumption of 31.7 mW from a 3.3-V supply.

Abstract

In this paper we present a novel low power 6-bit Flash analog-to-digital converter design using charge steering amplifier for RF applications. The architecture and performance of the designed ADC is described in detail and compared with conventional and other Flash ADCs. The proposed design offers lower power consumption by using a charge-steering amplifier based comparator; the power supply voltage is 0.7 V minimum which makes this design adaptable to wide variety of RF based System-on-Chip (SoC) applications. The ADC is designed in 28nm standard CMOS process with operating sampling frequency of 1GS/s and the performance parameters DNL and INL are ±0.3 LSB and ±0.35 LSB respectively, spurious-free dynamic range (SFDR) is 39 dB, signal-to-noise and distortion ratio (SNDR) is 37.15 dB, effective number of bits (ENOB) is 5.88 bits, power consumption is 3.57 mW @ 0.7 V supply voltage and FOM is 60.6 fJ/conversion-step.

Abstract

Opportunistic reuse is a need based sourcing of software modules without a prior reuse plan. It is a common tactical approach in software development. Developers often reuse an external software module opportunistically to improve their productivity. But, studies have shown that this results in extensive refactoring and adds maintenance owes. We assert this problem to the mismatches between the software under development and the reused external module; caused because of their different assumptions and constraints. We highlight the problems of such opportunistic reuse practices with the help of a case study. In our study, we found issues such as unanticipated behavior, violated constraints, conflict in assumption, fragile structure, and software bloat. In this paper, we like to draw attention of the research community to the wide spread opportunistic reuse practices and the lack of methods to pro-actively identify and resolve the mismatches. We propose the need for supporting developers in reasoning before reuse from the perspective of identifying and fixing both local and global mismatches. Furthermore, we identify other opportunistic software development practices where similar issues can be observed and also suggest the research areas where further investigation can benefit developers in improving their productivity. Copyright © 2016 John Wiley & Sons, Ltd.

Abstract

The purpose of this paper is to present the model of a Humanoid robot inspired by Poppy, modified for heavier load capacity and the balancing of humanoid in multiple work environments. The design has been modified in order to use MX-64 servos with more torque capacity than MX-28 servos which were used in original design. We have also redesigned the ankle joint and feet to make it a more accurate human like model. We are using an integrated approach using zero moment point (ZMP) with force sensing resistor (FSR) and center of mass (CoM) to find balance margins of the robot. Balancing and forward bending experiments on robot are conducted by providing some basic motion to the robot and ensuring that the robot is balanced and moving within safe margins using this approach.

Abstract

The primary objective of a robot is to substitute or complement humans in life-endangering situations. The paper deals with the design and analysis of a robot suitable for such Urban Search and Rescue operation (USAR) scenarios. A survey of the existing robots in this field is done and new design considerations have been developed. Further, quasi-static analysis of the robot along a circular stair is performed to confirm whether the design considerations will satisfy versatility as well as mobility, the key requirements of a true uneven terrain robot. Keywords— Compliant Design; Multi-module robot; Nonlinear optimization; 3D Quasi Static Model

Abstract

Facial fiducial detection is a challenging problem for several reasons like varying pose, appearance, expression, partial occlusion and others. In the past, several approaches like mixture of trees [32], regression based methods [8], exemplar based methods [7] have been proposed to tackle this challenge. In this paper, we propose an exemplar based approach to select the best solution from among outputs of regression and mixture of trees based algorithms (which we call candidate algorithms). We show that by using a very simple SIFT and HOG based descriptor, it is possible to identify the most accurate fiducial outputs from a set of results produced by candidate algorithms on any given test image. Our approach manifests as two algorithms, one based on optimizing an objective function with quadratic terms and the other based on simple kNN. Both algorithms take as input fiducial locations produced by running state-of-the-art candidate algorithms on an input image, and output accurate fiducials using a set of automatically selected exemplar images with annotations. Our surprising result is that in this case, a simple algorithm like kNN is able to take advantage of the seemingly huge complementarity of these candidate algorithms, better than optimization based algorithms. We do extensive experiments on several datasets, and show that our approach outperforms state-of-the-art consistently. In some cases, we report as much as a 10% improvement in accuracy. We also extensively analyze each component of our approach, to illustrate its efficacy. An implementation and extended technical report of our approach is available www.sites.google.com/site/wacv2016facefiducialexemplars.

Abstract

A good post processing module is an indispensable part of an OCR pipeline. In this paper, we propose a novel method for error detection in Indian language OCR output. Our solution uses a recurrent neural network ( RNN ) for classification of a word as an error or not. We propose a generic error detection method and demonstrate its effectiveness on four popular Indian languages. We divide the words into their constituent aksharas and use their bigram and trigram level information to build a feature representation. In order to train the classifier on incorrect words, we use the mis-recognized words in the output of the OCR . In addition to RNN , we also explore the effectiveness of a generative model such as GMM for our task and demonstrate an improved performance by combining both the approaches. We tested our method on four popular Indian languages and report an average error detection performance above 80%.