Abstract
Modern embedded system based on Systems-on-Chip (Systems) must deliver high performance under constrained power, memory, and hardware area budgets. These systems integrate heterogeneous processing units, including CPUs, DSPs, hardware accelerators, and multi-level memory hierarchies. However, poor coordination between hardware and software, inefficient task scheduling, memory contention, communication bottlenecks, and static power consumption degrade overall efficiency. This paper presents a comprehensive review of hardware-software optimization strategies across four complementary domains: power, memory, resource, and performance optimization. Architecture-level low-power design, cache-aware data placement, communication-aware scheduling, controlled retiming, and hardware-software partitioning is consolidated into a unified design methodology for energy-efficient embedded Systems. Recent trends such as energy-harvesting platforms, near-threshold computing, approximate computing, DMA-driven performance acceleration, and machine learning based power management are also discussed. This survey aims to provide embedded system designers with a holistic framework for co-optimizing hardware and software to achieve sustainable, high-performance System architectures for future intelligent edge environments