Abstract

We propose an active learning based solution for efficient, scalable and accurate annotations of objects in video sequences. Recent computer vision solutions use machine learning. Effectiveness of these solutions relies on the amount of available annotated data which again depends on the generation of huge amount of accurately annotated data. In this paper, we focus on reducing the human annotation efforts with simultaneous increase in tracking accuracy to get precise, tight bounding boxes around an object of interest. We use a novel combination of two different tracking algorithms to track an object in the whole video sequence. We propose a sampling strategy to sample the most informative frame which is given for human annotation. This newly annotated frame is used to update the previous annotations. Thus, by collaborative efforts of both human and the system we obtain accurate annotations with minimal effort. Using the proposed method, user efforts can be reduced to half without compromising on the annotation accuracy. We have quantitatively and qualitatively validated the results on eight different datasets.

Abstract

Color and strokes are the salient features of text regions in an image. In this work, we use both these features as cues, and introduce a novel energy function to formulate the text binarization problem. The minimum of this energy function corresponds to the optimal binarization. We minimize the energy function with an iterative graph cut-based algorithm. Our model is robust to variations in foreground and background as we learn Gaussian mixture models for color and strokes in each iteration of the graph cut. We show results on word images from the challenging ICDAR 2003/2011, born-digital image and street view text datasets, as well as full scene images containing text from ICDAR 2013 datasets, and compare our performance with state-of-the-art methods. Our approach shows significant improvements in performance under a variety of performance measures commonly used to assess text binarization …

Abstract

Popularity of wearable cameras in life logging, law enforcement, assistive vision and other similar applications is leading to explosion in generation of egocentric video content. First person action recognition is an important aspect of automatic analysis of such videos. Annotating such videos is hard, not only because of obvious scalability constraints, but also because of privacy issues often associated with egocentric videos. This motivates the use of unsupervised methods for egocentric video analysis. In this work, we propose a robust and generic unsupervised approach for first person action clustering. Unlike the contemporary approaches, our technique is neither limited to any particular class of action nor requires priors such as pre-training, fine-tuning, etc. We learn time sequenced visual and flow features from an array of weak feature extractors based on convolutional and LSTM autoencoder networks. We demonstrate that clustering of such features leads to the discovery of semantically meaningful actions present in the video. We validate our approach on four disparate public egocentric actions datasets amounting to approximately 50 hours of videos. We show that our approach surpasses the supervised state of the art accuracies without using the action labels.

Abstract

e datasets. We propose an EEG (Electroencephalogram)-based image annotation system. While humans can recognize objects in 20–200 ms, the need to manually label images results in a low annotation throughput. Our system employs brain signals captured via a consumer EEG device to achieve an annotation rate of up to 10 images per second. We exploit the P300 event-related potential (ERP) signature to identify target images during a rapid serial visual presentation (RSVP) task. We further perform unsupervised outlier removal to achieve an F1-score of 0.88 on the test set. The proposed system does not depend on category-specific EEG signatures enabling the annotation of any new image category without any model pre-training.

Abstract

The ideal goal of any program logic is to develop logically correct programs without the need for predominant debugging. Separation logic is considered to be an effective program logic for proving programs that involve pointers. Reasoning with pointers becomes difficult especially due to the way they interfere with the modular style of program development. For instance, often there is aliasing arising due to several pointers to a given cell location. In such situations, any alteration to that cell in one of the program modules may affect the values of many syntactically unrelated expressions in other modules. In this chapter, we try to explore these difficulties through some simple examples and introduce the notion of separating conjunction as a tool to deal with it. We introduce separation logic as an extension of Hoare Logic using a programming language that has four pointer-manipulating commands. These commands perform the usual heap operations such as lookup, update, allocation and de-allocation. The new set of assertions and axioms of separation logic are presented in a semi-formal style. Examples are given to illustrate unique features of the new assertions and axioms. Finally, the chapter concludes with proofs of some real programs using the axioms of separation logic.

Abstract

In this paper, utilizing the feature of the sonority, the problems of detecting the syllable nuclei and the syllable boundaries are explored. As there is minimal obstruction in the oral cavity in the production of sonorant sounds, sonority feature is used. A method is proposed for extracting the sonority profile from the strength of the dominant resonance frequency using the zero time windowing method. The strength of the dominant resonance frequencies in the specific band of 500 Hz to 1700 Hz is used. The proposed method is evaluated on SVL-DD-NEWScorpora. The results are compared with the Fourier transform method and the energy-based method of extracting the sonority profile. The proposed method performed better compared to other methods, especially in the presence of noise such as white, pink and babble. The method is also evaluated on TIMIT test database and the performance is on par with the current methods in detecting the syllable nuclei.

Abstract

In this paper, we propose a hybrid CPU+GPU data structure, that optimizes search operation for frequently accessed search keys. This is based on the working-set structure due to Badiu et al. [1]. The main idea is to maintain a dynamic set of most frequently accessed keys in the GPU memory and the rest of the keys in the CPU main memory. Further, search queries are processed in batches of size 1K to 16K (K = 210). We measured the query throughput of our data structure using Millions of Queries Processed per Second (MQPS) as a metric, on different key access distributions. On distributions, where some keys are accessed more frequently than others, we achieved 2x higher MQPS when compared to a highly tuned hash map provided by C++ BOOST library, and 1.5x higher MQPS against the B+ tree implementation in the Rodinia GPU benchmark. We further showed the effectiveness of our structure, when it is used to store visited vertices information in breadth-first search traversal of graphs. Here, we achieved 1.2x and 1.5x speedups when compared to the BOOST hash map and the GPU B+ trees respectively.

Abstract

This paper proposes low-power design of the Gaussian-Minimum Shift-Keying (GMSK) demodulator using baseband quadrature signals. High-level architecture of this demodulator incorporates CO-ordinate Rotation-DIgital Computer (CORDIC) engine to accept the in-phase and quadrature components from received GMSK signal to generate phase angle and magnitude of the GMSK signal vector at half the sampling frequency thereby reducing the power consumption. Additionally, the design of differentiator and synchronizer for the suggested GMSK demodulator has been carried out. The proposed demodulator is implemented in field-programmable gate-array (FPGA) and post-route simulated for functional verification. Thereafter, BER performance analysis of this design has been carried out in Additive White Gaussian Noise (AWGN) channel environment. Finally, the suggested architecture is synthesized and post-layout simulated using 90 nm CMOS technology node. It occupies a core area of 0.12 mm 2 with 17770 gates and consumes 4.42 mW at 167 MHz of clock frequency.

Abstract

This paper presents new system-level design for the cognitive sensor based on energy detection to boast the performance accuracy by maintaining a queue of energy samples and computing their average to determine the decision threshold. Thereafter, these values summed over average number of samples are again compared with the recent energy value to decide whether the spectrum is occupied or unoccupied more accurately. The performance of such technique is evaluated analytically for various decision thresholds. Such evaluations indicate that the some advancements made to the energy detection algorithm has demonstrated improvements in the spectrum sensing accuracy under varying signal to noise ratio (SNR) values. Subsequently, we have shown the benefits of the proposed scheme in increas- ing the agility of cognitive radio systems. The performance is measured by using the receiver operating characteristic (ROC) curves under varying number of levels for different SNR values like: -5 dB, -10 dB, -15 dB and -20 dB. With small tradeoffs between the detection probability and the false alarm probability, the scheme improves the spectrum sensing ability greatly in low SNR situations when tested with 10, 100, 1000, 10000 and 100000 samples. Thereby, enhancing the performance of such hardware friendly sensors under low SNR has been a potential achievement of our work. Finally, field-programmable gate-array (FPGA) prototyping of the proposed sensor architecture has been carried out and it has a latency of 21760 nS. Index Terms—Digital Design, FPGA, cognitive radio, detection probability, spectrum sensing and energy detection

Abstract

MIL-STD-1553B data buses are in use in almost all aircrafts and many ground-based military vehicles. But, present day aircraft equipments have much higher bandwidth requirements compared to what is offered by 1-Mb/s legacy 1553 system hardware. A complete rewiring would result in the aircrafts being non operational for a long time, in addition to its high cost of implementation. Instead, only the obsolete MIL-STD-1553 system-on-chip integrated circuits can be substituted to extend their functionality to higher data rates. In this work, we describe the operating principle and implementation of a low power transceiver upgrade which effectively equalizes a 1553 channel across the whole 100-MHz spectrum. Implemented in 0.18μm, this transceiver upgrade circuit achieves a BER of < 10 −16 over a 300-ft 1553 bus while receiving 100-Mb/s data, with a total power consumption of 31.7 mW from a 3.3-V supply.